The present invention relates generally to operational amplifiers having wide input common mode voltage range, and particularly to such operational amplifiers that include two differential input transistor pairs with “redirection” or “diverting” of tail currents from one input transistor pair to the other as the common mode voltage range changes, and more particularly to improvements which optimize current density in folded cascode circuit active load transistors so as to provide improved noise performance, improved power consumption, improved slew rate, improved overdrive recovery, and low-voltage rail-to-rail circuit operation.
Operational amplifiers having wide input common mode voltage range frequently use two differential input transistor pairs of opposite conductivity type. For example, in one such operational amplifier one input transistor pair includes P-channel MOS input transistors or PNP input transistors and the other input transistor pair includes N-channel MOS input transistors or NPN input transistors. The operational amplifier includes a circuit that monitors the common mode input voltage and operates to “redirect” tail current from the power supply to one input transistor pair or the other, depending on the value of the common mode input voltage.
FIG. 1 shows such a prior art CMOS rail-to-rail operational amplifier in which the drain currents of the two input transistor pairs are coupled to active load transistors which are part of a folded cascode circuit. Operational amplifier 1A includes a “low common mode” voltage input stage 2 including source-coupled P-channel input transistors 10 and 11 and a P-channel tail current transistor 14, wherein P-channel transistor pair 10,11 is operative or “active” only when the common mode (input) voltage is lower than a predetermined common mode threshold voltage CMTHR. Tail current transistor 14 is the output transistor of a controlled current mirror also including diode-connected P-channel transistor 17. Operational amplifier 1A also includes a “high common mode voltage” input stage 3 including source-coupled N-channel input transistors 12 and 13 and an N-channel tail current transistor 15 which is the output transistor of a controlled current mirror including diode-connected N-channel transistor 44, wherein N-channel transistor pair 12,13 is operative or “active” only when the common mode voltage is greater than the predetermined common mode threshold voltage CMTHR. Input signal VIN+ is connected by conductor 7 to the gates of transistors 11 and 12, and input signal VIN− is connected by conductor 8 to the gates of input transistors 10 and 13.
The drains of input transistors 10 and 11 are connected by conductors 35 and 36 to drains of N-channel active load transistors 25 and 24, respectively, which are part of folded cascode circuit or stage 5. The gates of active load transistors 24 and 25 are connected to diode-connected N-channel transistor 30, which is biased by a current source 31. The drains of N-channel input transistors 12 and 13 are connected by conductors 37 and 38 to the drains of P-channel active load transistors 20 and 21, respectively, of folded cascode circuit 5. The gates of active load transistors 20 and 21 are connected by conductor 34 to the output of a common mode feedback circuit 6, the inputs of which are connected to output conductors 32 and 33 on which output signals VOUT− and VOUT+, respectively, are produced. Output conductor 32 is coupled through P-channel cascode transistor 22 to conductor 37 and through N-channel cascode transistor 26 to conductor 36. Similarly, output conductor 33 is coupled through P-channel cascode transistor 23 to conductor 38 and through N-channel cascode transistor 27 to conductor 35.
Operational amplifier 1A further includes a common mode switch circuit 4 including P-channel transistors 40, 41, and 42, the sources of which are connected to a tail current source 28. The gate of transistor 40 is connected to VIN+, the gate of transistor 41 is connected to VIN−, and the gate of transistor 42 is connected to the common mode threshold reference voltage CMTHR. The drains of transistors 40 and 41 are connected by conductor 46 to the gate and drain of N-channel diode-connected transistor 43 and to the gate of a N-channel transistor 16 which controls a current mirror including transistor 17 and tail current transistor 14. The drain of transistor 42 is connected by conductor 47 to the gate and drain of diode-connected N-channel transistor 44 and to the gate of tail current transistor 15. Common mode switch circuit 4 detects whether the common mode input voltage of the differential input signal (VIN+−VIN−) is above or below the common mode threshold reference voltage CMTHR, and accordingly switches one of tail current transistors 14 and 15 on and switches the other tail current transistor off.
Specifically, if either of VIN+ or VIN− is less than the common mode threshold voltage CMTHR, i.e., if the common mode input voltage is “low”, then transistors 42, 44, and 15 are off and transistors 43, 16, 17, and 14 are on. Therefore, only the P-channel low common mode voltage input stage 2 is active. However, if both VIN+ and VIN− are greater than the common mode threshold voltage CMTHR, i.e., if the common mode input voltage is “high”, then transistors 42, 44, and 15 are on and transistors 43, 16, 17 and 14 are off. Therefore, only the N-channel high common mode threshold voltage input stage 3 is active.
A goal in designing an operational amplifier such as prior art operational amplifier 1A is to minimize the current through the folded cascode circuit in order to achieve the best input referred noise, low power consumption, small active load devices in the folded cascode circuit, fast slew rate, and fast overdrive recovery time, and also to achieve good low-voltage rail-to-rail operation. Note that in designing a circuit such as folded cascode circuit 5, the bias voltages VBIASP and VBIASN would be selected so as to ensure the drain-source voltages of the active load transistors 20, 21, 24 and 25 would be at least approximately 100 millivolts beyond the drain-source voltages of those transistors enters into their “triode” or “linear” regions. This would be necessary because the circuitry starts losing gain as soon as the cascode transistors 22, 23, 26 and 27 enter their “triode” or “linear” regions, and that results in loss of range of VOUT. Therefore, if the current through the active load transistors 20, 21, 24 and 25 varies by a factor of 2 or 3, then it is necessary to make the load transistors larger to achieve good low voltage operation.
The redirection or switching of tail current from one input transistor pair (e.g., transistors 10 and 11) to the other input transistor pair (transistors 12 and 13) changes the currents in the P-channel active load transistors 20 and 21 and the N-channel active load transistors 24 and 25 in folded cascode circuit 5. To ensure functional operation of folded cascode circuit 5 to ensure proper slew rates in both the low common mode input voltage and high common mode input voltage conditions and to ensure fast overdrive recovery, the current in the active load transistors 20, 21, 24 and 25 must be larger than the input pair tail currents.
To understand this point, it should be noted that the tail current of the “active” input transistor pair 10,11 or 12,13 when it is switched on (in accordance with whether the present common mode voltage is less than or greater than the common mode threshold CMTHR) is added to the “idle” current in the corresponding active load transistors 24,25 or 20, 21, respectively. Also, the tail current of the “inactive” input transistor pair 10,11 or 12,13 when it is switched off (in accordance with whether the present common mode voltage is less than or greater than the common mode threshold CMTHR) is subtracted from the “idle” current in the corresponding active load transistors 24,25 or 20, 21, respectively.
This means that the active load transistors 20, 21, 24, and 25 in folded cascode circuit 5 must be physically large enough to conduct the sum of the “idle” current and the currents through the transistors of the active input pair. The idle current flowing through them must be large enough to ensure that an adequate operating current flows through the active load devices when their corresponding input transistor pairs are either “active” or “inactive”.
For example, suppose the N-channel input stage 12,13 is switched to an active condition in response to a high common mode voltage and the current through transistor 15 is 20 microamperes, and the active load transistors 20, 21, 24 and 25 each are designed to conduct 10 microamperes. Then N-channel active load transistors 24 and 25 each will be conducting 10 microamperes, and P-channel active load transistors 20 and 21 will be conducting 20 microamperes. Then, if the common mode voltage goes to a “low” value, N-channel tail current transistor 15 is switched off and the N-channel input transistor pair 12,13 becomes inactive, i.e., turned off. At the same time, P-channel tail current transistor 14 is switched on and conducts 20 microamperes, so P-channel input transistors 10 and 11 each conduct 10 microamperes. However, since the N-channel active load transistors 24 and 25 are designed to sink only 10 microamperes, no current is available to flow through the cascode transistors 22, 23, 26, 27 to P-channel active load transistors 20 and 21. This causes folded cascode circuit 5 to become inoperative.
The foregoing example shows what would happen if the active load transistors 20, 21, 24, and 25 are not physically large enough and are not biased with sufficiently large “idle” currents. To avoid the above described inoperability of folded cascode circuit 5, active load transistors 20, 21, 24 and 25 would normally be designed to be large enough to safely conduct at least 20 microamperes so that there would always be adequate operating current in the active load transistors when their corresponding input pairs are in either their “active” or “inactive” configurations. However, the above described large size of the active load transistors and large “idle” or bias current flowing through them results in a large “redundant” current flowing through folded cascode circuit 5, which is undesirable because that causes increased circuit noise and increased power consumption. Use of large ratio current changes in the active load transistors necessitates use of large active load transistors, but this is undesirable because they have large transconductance (gm), which results in large input-referred noise.
In general, it is difficult optimize the design of a rail-to-rail folded cascode stage for switched input transistor pairs, especially for low voltage, low noise, low-power operation.
Another approach to solving the foregoing problems includes use of a so called “floating current source”, wherein an auxiliary amplifier monitors and adjusts the currents in the folded cascode circuit, as described in commonly owned patent U.S. Pat. No. 6,150,883 entitled “RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIER AND METHOD” issued to Vadim V. Ivanov on Nov. 21, 2000. However, this approach presents difficulties in a fully differential operational amplifier if there is a need to include gain boost circuitry. The described floating current sources tend to “tie up” one circuit node associated with the cascode transistors so as to not allow use of gain boost circuitry at that point without considerable additional circuit complexity.
Thus, there is an unmet need for an operational amplifier having a wide common mode voltage input range and also having minimum noise.
There also is an unmet need for an operational amplifier having a wide common mode voltage input range and also having low power consumption.
There also is an unmet need for an operational amplifier having a wide common mode voltage input range which operates with optimal current densities in the active load transistors in a folded cascode circuit.
There also is an unmet need for an operational amplifier having a wide common mode voltage input range which operates with optimal current densities in the active load transistors in a folded cascode circuit to provide a high slew rate.
There also is an unmet need for an operational amplifier having a wide common mode voltage input range which operates with optimal current densities in the active load transistors in a folded cascode circuit to provide fast recovery from overdrive conditions.
There also is an unmet need for an operational amplifier having a wide common mode voltage input range which operates with optimal current densities in the active load transistors in a folded cascode circuit so as to provide good rail-to-rail operation at low supply voltages.
There also is an unmet need for a way to provide a fully differential operational amplifier having a wide common mode voltage input range while using gain boost circuitry on both sides of the folded cascode circuitry and nevertheless avoiding complexities associated with use of floating current sources of the kind described in commonly owned patent U.S. Pat. No. 6,150,883 for use in a fully differential operational amplifier.